1. Field of the Invention
The present invention relates to electronic circuits, and more particularly, to techniques for transmitting on-chip termination control signals in serial to input/output blocks.
2. Description of the Related Art
Signal reflection can occur on transmission lines when there is a mismatch between the impedance of the transmission line and the impedance of the transmitter and/or receiver. The reflected signal can interfere with the transmitted signal, causing distortion and degrading signal integrity.
To solve this problem, transmission lines are resistively terminated by a matching impedance to minimize or eliminate signal reflection. Input/output (IO) pins on an integrated circuit package are often terminated by coupling external termination resistors to the appropriate IO pins. However, many integrated circuit packages require a large number of termination resistors, because they have a large number of IO pins. Therefore, it is becoming more common to resistively terminate transmission lines using on-chip termination (OCT) to reduce the number of external components.
In order to provide a precise resistance value for on-chip termination (OCT), an OCT calibration block is used to calibrate the resistance using an off-chip resistor as a reference value. The OCT calibration block generates an N-bit code and transmits the N-bit code in parallel to IO buffer regions. N number of parallel conductors are used to transmit the code from an OCT calibration block.
In a field programmable gate array (FPGA), M number of OCT calibration blocks are used to support input/output (IO) banks having M number of unique IO standards. Each of the OCT calibration blocks routes an N-bit code in parallel to all of the IO banks on the chip so that the IO buffers in each IO bank can be configured according to any of the IO standards. This scheme uses M×N number of conductors going all the way around the periphery of a chip.
Take, for example, an FPGA that has 10 OCT calibration blocks and 40 IO banks. If each OCT calibration block generates a 24-bit code (12-bits for the PMOS transistors and 12-bits for the NMOS transistors), 240 conductors are needed to transmit the 24-bit codes in parallel from each of the 10 OCT calibration blocks. Also, shield conductors may be used to isolate each set of codes. Such a large number of conductors would dramatically increase the peripheral area of the chip.
Therefore, it would be desirable to provide techniques for controlling on-chip termination that limit the number of routing conductors used to transmit the OCT control signals.